Senior SerDes Circuit Design Engineer
Sunnyvale, CA
180-300k Base + Amazing Benefits

Our innovative and technically advanced client is at the leading edge of mixed-signal IP development. Through developing and delivering low-power integrated clocking and interconnected IP, they are well-placed for further growth. To maintain their enviable position, they have an immediate opening in Sunnyvale for a Senior SerDes Circuit Design Engineer.

As a Senior SerDes Circuit Design Engineer, you will:

Contribute to the circuit design of advanced Fin-FET SERDES macros
Design different circuit blocks: CTLE, DFE, data samplers, high-speed ADC, driver, PLL, clocking, CDR, etc.
Deliver layout supervision and post-layout analysis
Design review, and document
Perform silicon bring-up, debugging, and evaluation
Supervise and mentor junior level Design Engineers

To be successful in this role, you will possess the following skills, traits, and experience:

MSEE / Ph.D. in Electrical Engineering
5+ years of hands-on circuit design for high-speed SERDES
Knowledge of SERDES architecture
Strong understanding of analog design fundamentals
Mixed signal, analog, and digital circuit design in advanced FinFET processes
SERDES circuit implementation such as:

Analog front-end design for RX
Equalization design: CTLE, VGA, DFE
High-speed sampler design
Adaptation algorithms for system-level simulations
High-speed ADC
High-Speed Clocking
TX Serializer and Driver Design

Signal Integrity
J-BERT, high-speed scopes, etc. operation

The successful Senior SerDes Circuit Design Engineer can expect:

180-300k base salary
Flexible hybrid working
Creative, fun, and passionate team
Health, Vision, and Dental
401K and more

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